
<ns0:uwmetadata xmlns:ns0="http://phaidra.univie.ac.at/XML/metadata/V1.0" xmlns:ns1="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0" xmlns:ns10="http://phaidra.univie.ac.at/XML/metadata/provenience/V1.0" xmlns:ns11="http://phaidra.univie.ac.at/XML/metadata/provenience/V1.0/entity" xmlns:ns12="http://phaidra.univie.ac.at/XML/metadata/digitalbook/V1.0" xmlns:ns13="http://phaidra.univie.ac.at/XML/metadata/etheses/V1.0" xmlns:ns2="http://phaidra.univie.ac.at/XML/metadata/extended/V1.0" xmlns:ns3="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/entity" xmlns:ns4="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/requirement" xmlns:ns5="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/educational" xmlns:ns6="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/annotation" xmlns:ns7="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/classification" xmlns:ns8="http://phaidra.univie.ac.at/XML/metadata/lom/V1.0/organization" xmlns:ns9="http://phaidra.univie.ac.at/XML/metadata/histkult/V1.0">
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    <ns1:title language="sr">Modelovanje promena napona praga r-kanalnih VDMOS tranzistora snage izazvanih različitim tipovima naprezanja</ns1:title>
    <ns2:alt_title language="sr">Modelling of threshold voltage shift of p-channel power VDMOS transistors induced with different types of stressing : doctoral dissertation</ns2:alt_title>
    <ns1:language>sr</ns1:language>
    <ns1:description language="sr">In this dissertation, the analysis and development of the modelof the threshold voltage shift of p-channel power VDMOStransistors induced with different types of stressing is presented.Types of stresses include static negative bias temperaturestressing, pulsed negative bias temperature stressing, irradiationand magnetic field. For each type of stressing, underdifferent experiment conditions, several equivalent electricalcircuits for modelling of threshold voltage shift are presented.Values of the elements of the electrical circuits are relatedto the experimental conditions through in detail explainedmathematical relations. Validation of the equivalent circuitmodels is performed through calculation of absolute and relativeerror between experimental and modelled results. Theanalysis in certain parts also includes the application of theproposed models to other types of p-channel transistors. Thedeveloped models will enable the assessment of the value ofthe threshold voltage during operation, thereby enabling predictionof device lifetime. Analysis and conclusions are basedon experimental measurements, automated data processingPython scripts, numerical simulations and simulation resultsusing the LTspice software.</ns1:description>
    <ns1:description language="sr">Biografija autora sa bibliografijom: list. 158-166Bibliografija: list. 140-157  Datum odbrane: 2.12.2025. Microelectronics and Microsystems</ns1:description>
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        <ns3:firstname> Nikola, 1994-</ns3:firstname>
        <ns3:lastname>Mitrović</ns3:lastname>
        <ns3:conor>87385097</ns3:conor>
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      <ns1:ext_role>mentor</ns1:ext_role>
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        <ns3:firstname> Danijel, 1976-</ns3:firstname>
        <ns3:lastname>Danković</ns3:lastname>
        <ns3:conor>25409383</ns3:conor>
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      <ns1:date>2025</ns1:date>
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      <ns1:ext_role>predsednik komisije</ns1:ext_role>
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        <ns3:firstname> Zoran</ns3:firstname>
        <ns3:lastname>Prijić</ns3:lastname>
      </ns1:entity>
      <ns1:date>2025</ns1:date>
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      <ns1:role>63</ns1:role>
      <ns1:ext_role>član komisije</ns1:ext_role>
      <ns1:entity seq="0">
        <ns3:firstname> Ivica</ns3:firstname>
        <ns3:lastname>Manić</ns3:lastname>
      </ns1:entity>
      <ns1:date>2025</ns1:date>
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      <ns1:role>63</ns1:role>
      <ns1:ext_role>član komisije</ns1:ext_role>
      <ns1:entity seq="0">
        <ns3:firstname> Goran</ns3:firstname>
        <ns3:lastname>Ristić</ns3:lastname>
      </ns1:entity>
      <ns1:date>2025</ns1:date>
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      <ns1:role>63</ns1:role>
      <ns1:ext_role>član komisije</ns1:ext_role>
      <ns1:entity seq="0">
        <ns3:firstname> Snežana</ns3:firstname>
        <ns3:lastname>Đorić Veljković</ns3:lastname>
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      <ns1:date>2025</ns1:date>
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  <ns1:technical>
    <ns1:format>166 listova</ns1:format>
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    <ns1:location>http://phaidrani.ni.ac.rs/o:3235</ns1:location>
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    <ns1:cost>no</ns1:cost>
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      <ns6:date>2026-03-27T18:57:35.320Z</ns6:date>
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    <ns1:purpose>70</ns1:purpose>
    <ns7:keyword language="sr" seq="1">modelovanje, napon praga, VDMOSFET, ekvivalentno ko-lo, simulacija</ns7:keyword>
    <ns7:keyword language="sr" seq="1">modelling, threshold voltage, VDMOSFET, equivalent circuit,simulation</ns7:keyword>
    <ns7:keyword language="sr" seq="1">(621.382.3+621.3.049.77):004.414.23</ns7:keyword>
    <ns7:keyword language="sr" seq="1">T171 Microelectronics</ns7:keyword>
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